Note: TCM TIS Header files, same TPM v1.2 spec

/*++
    TITILE      : TISTCM.H     
    DATE        : July 29 2010
    AUTHOR      : Kun-Yi Chen
    DESCRIPTION : TCM Interface Specification
    Reference Document.
        ZTEIC TCM BIOS Porting guide UEFI ver 0.91.pdf
–*/
#ifndef _TIS_TCM_H_
#define _TIS_TCM_H_
//
// Set structure alignment to 1-byte
//
#pragma pack (push)
#pragma pack (1)

typedef struct tdTCM_REGISTERS {
  UINT8                             access;             // 0
  UINT8                             reserved1[7];       // 1
  UINT32                            intEnable;          // 8
  UINT8                             intVector;          // 0ch
  UINT8                             reserved2[3];       // 0dh
  UINT32                            intSts;             // 10h
  UINT32                            intfCapability;     // 14h
  UINT8                             status;             // 18h
  UINT16                            burstCount;         // 19h
  UINT8                             reserved3[9];
  UINT32                            dataFifo;           // 24
  UINT8                             reserved4[0xed8];   // 28h
  UINT16                            vid;                // 0f00h
  UINT16                            did;                // 0f02h
  UINT8                             rid;                // 0f04h
  UINT8                             tcgDefined[0x7b];   // 0f05h
  UINT32                            legacyAddress1;     // 0f80h
  UINT32                            legacyAddress1Ex;   // 0f84h
  UINT32                            legacyAddress2;     // 0f88h
  UINT32                            legacyAddress2Ex;   // 0f8ch
  UINT8                             vendorDefined[0x70];// 0f90h
} TIS_TCM_REGISTERS, *TIS_TCM_REGISTERS_PTR;

#pragma pack(pop)

#define TCM_BASE_ADDRESS            (0xFED40000)

#define _TCM_NTH_BIT(n)             (1<<n)
#define TCM_ACC_VALID               _TCM_NTH_BIT(7)
#define TCM_ACC_ACTIVE_LOCALITY     _TCM_NTH_BIT(5)
#define TCM_ACC_BEEN_SEIZED         _TCM_NTH_BIT(4)
#define TCM_ACC_SEIZE               _TCM_NTH_BIT(3)
#define TCM_ACC_PENDING_REQUEST     _TCM_NTH_BIT(2)
#define TCM_ACC_REQUEST_USE         _TCM_NTH_BIT(1)
#define TCM_ACC_ESTABLISHMENT       _TCM_NTH_BIT(0)

#define TCM_STS_VALID               _TCM_NTH_BIT(7)
#define TCM_STS_READY               _TCM_NTH_BIT(6)
#define TCM_STS_GO                  _TCM_NTH_BIT(5)
#define TCM_STS_DATA_AVAILABLE      _TCM_NTH_BIT(4)
#define TCM_STS_EXPECT              _TCM_NTH_BIT(3)
#define TCM_STS_RESPONSE_RETRY      _TCM_NTH_BIT(1)

#define ACCESS_WAITCOUNT            (750 * 1000 / 100)
#define ACCESS_WAITCOUNTB           (3 * 1000000 / 100)
#define TIS_TCM_TIMEOUT_A           ACCESS_WAITCOUNT
#define TIS_TCM_TIMEOUT_B           ACCESS_WAITCOUNTB
#define TIS_TCM_TIMEOUT_C           ACCESS_WAITCOUNT
#define TIS_TCM_TIMEOUT_D           ACCESS_WAITCOUNT
#endif

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