Note: PCI & PCI-E Configuration Space Access Method on PC-AT Compatible system

PCI & PCI-E Configuration Space Memory Map

image

PCI Configuration Space Access Method, Just read 256 Bytes space

Use a pair IO Register to access the spaces on PC-AT compatible System.

Config Address Register(0xCF8, 32bits width) & Config Data Register(0xCFC, 32bits width)

image

PCI Express Enhanced Configuration Address Mapping

Use MMIO (Memory Mapping IO) to access the Enhanced Configuration Space.

ACPI support a MCFG Table to describe PCI Express Root Base address [63:0]

[63:28] is base address part, [27:0] format following the below figure

image

ref. http://www.pcisig.com/developers/main/training_materials/get_document?doc_id=2196e7be4778f458579ed38efb2a3d5b21d4efa7

AMD has a document to describe “how to access the configuration spaces in PCI/PCI-E in Windows/Linux/Solaris”

http://developer.amd.com/Assets/pci%20-%20pci%20express%20configuration%20space%20access.pdf

問題來了, 在非 PC Embedded System 這個MCFG 要怎樣處里, 透過Boot Parameter 通知Kernel?

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